/*
 * Copyright (c) 2017, Intel Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 * 3. Neither the name of the Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __QM_PIN_FUNCTIONS_H__
#define __QM_PIN_FUNCTIONS_H__

/**
 * SoC Pins definition.
 *
 * @defgroup group SOC_PINS
 * @{
 */

#include "qm_common.h"

/*
 * This file provides an abstraction layer for pin numbers and pin functions.
 */

/* Package pins to pin IDs. */

/* BGA144 package. */
#define QM_PIN_ID_BGA144_D12 QM_PIN_ID_0
#define QM_PIN_ID_BGA144_E10 QM_PIN_ID_1
#define QM_PIN_ID_BGA144_E11 QM_PIN_ID_2
#define QM_PIN_ID_BGA144_E12 QM_PIN_ID_3
#define QM_PIN_ID_BGA144_F9 QM_PIN_ID_4
#define QM_PIN_ID_BGA144_F10 QM_PIN_ID_5
#define QM_PIN_ID_BGA144_L9 QM_PIN_ID_6
#define QM_PIN_ID_BGA144_K8 QM_PIN_ID_7
#define QM_PIN_ID_BGA144_F11 QM_PIN_ID_8
#define QM_PIN_ID_BGA144_F12 QM_PIN_ID_9
#define QM_PIN_ID_BGA144_G9 QM_PIN_ID_10
#define QM_PIN_ID_BGA144_G10 QM_PIN_ID_11
#define QM_PIN_ID_BGA144_G11 QM_PIN_ID_12
#define QM_PIN_ID_BGA144_G12 QM_PIN_ID_13
#define QM_PIN_ID_BGA144_K10 QM_PIN_ID_14
#define QM_PIN_ID_BGA144_K9 QM_PIN_ID_15
#define QM_PIN_ID_BGA144_H11 QM_PIN_ID_16
#define QM_PIN_ID_BGA144_H12 QM_PIN_ID_17
#define QM_PIN_ID_BGA144_E8 QM_PIN_ID_18
#define QM_PIN_ID_BGA144_E9 QM_PIN_ID_19
#define QM_PIN_ID_BGA144_C12 QM_PIN_ID_20
#define QM_PIN_ID_BGA144_B12 QM_PIN_ID_21
#define QM_PIN_ID_BGA144_D11 QM_PIN_ID_22
#define QM_PIN_ID_BGA144_C11 QM_PIN_ID_23
#define QM_PIN_ID_BGA144_A11 QM_PIN_ID_24
#define QM_PIN_ID_BGA144_B11 QM_PIN_ID_25
#define QM_PIN_ID_BGA144_C10 QM_PIN_ID_26
#define QM_PIN_ID_BGA144_D10 QM_PIN_ID_27
#define QM_PIN_ID_BGA144_A10 QM_PIN_ID_28
#define QM_PIN_ID_BGA144_B10 QM_PIN_ID_29
#define QM_PIN_ID_BGA144_C9 QM_PIN_ID_30
#define QM_PIN_ID_BGA144_A9 QM_PIN_ID_31
#define QM_PIN_ID_BGA144_D9 QM_PIN_ID_32
#define QM_PIN_ID_BGA144_B9 QM_PIN_ID_33
#define QM_PIN_ID_BGA144_C8 QM_PIN_ID_34
#define QM_PIN_ID_BGA144_A8 QM_PIN_ID_35
#define QM_PIN_ID_BGA144_B7 QM_PIN_ID_36
#define QM_PIN_ID_BGA144_B8 QM_PIN_ID_37
#define QM_PIN_ID_BGA144_C7 QM_PIN_ID_38
#define QM_PIN_ID_BGA144_A7 QM_PIN_ID_39
#define QM_PIN_ID_BGA144_D8 QM_PIN_ID_40
#define QM_PIN_ID_BGA144_D7 QM_PIN_ID_41
#define QM_PIN_ID_BGA144_D6 QM_PIN_ID_42
#define QM_PIN_ID_BGA144_B6 QM_PIN_ID_43
#define QM_PIN_ID_BGA144_A6 QM_PIN_ID_44
#define QM_PIN_ID_BGA144_C6 QM_PIN_ID_45
#define QM_PIN_ID_BGA144_B5 QM_PIN_ID_46
#define QM_PIN_ID_BGA144_A5 QM_PIN_ID_47
#define QM_PIN_ID_BGA144_D5 QM_PIN_ID_48
#define QM_PIN_ID_BGA144_C5 QM_PIN_ID_49
#define QM_PIN_ID_BGA144_B4 QM_PIN_ID_50
#define QM_PIN_ID_BGA144_D4 QM_PIN_ID_51
#define QM_PIN_ID_BGA144_A4 QM_PIN_ID_52
#define QM_PIN_ID_BGA144_C4 QM_PIN_ID_53
#define QM_PIN_ID_BGA144_B3 QM_PIN_ID_54
#define QM_PIN_ID_BGA144_A3 QM_PIN_ID_55
#define QM_PIN_ID_BGA144_C3 QM_PIN_ID_56
#define QM_PIN_ID_BGA144_D3 QM_PIN_ID_57
#define QM_PIN_ID_BGA144_E4 QM_PIN_ID_58
#define QM_PIN_ID_BGA144_E3 QM_PIN_ID_59
#define QM_PIN_ID_BGA144_B2 QM_PIN_ID_60
#define QM_PIN_ID_BGA144_Q2 QM_PIN_ID_61
#define QM_PIN_ID_BGA144_C2 QM_PIN_ID_62
#define QM_PIN_ID_BGA144_D2 QM_PIN_ID_63
#define QM_PIN_ID_BGA144_B1 QM_PIN_ID_64
#define QM_PIN_ID_BGA144_E2 QM_PIN_ID_65
#define QM_PIN_ID_BGA144_C1 QM_PIN_ID_66
#define QM_PIN_ID_BGA144_D1 QM_PIN_ID_67
#define QM_PIN_ID_BGA144_E1 QM_PIN_ID_68

/* WLCSP144 package. */
#define QM_PIN_ID_WLCSP144_F2 QM_PIN_ID_0
#define QM_PIN_ID_WLCSP144_G4 QM_PIN_ID_1
#define QM_PIN_ID_WLCSP144_H5 QM_PIN_ID_2
#define QM_PIN_ID_WLCSP144_J6 QM_PIN_ID_3
#define QM_PIN_ID_WLCSP144_K6 QM_PIN_ID_4
#define QM_PIN_ID_WLCSP144_L6 QM_PIN_ID_5
#define QM_PIN_ID_WLCSP144_H4 QM_PIN_ID_6
#define QM_PIN_ID_WLCSP144_G3 QM_PIN_ID_7
#define QM_PIN_ID_WLCSP144_L5 QM_PIN_ID_8
#define QM_PIN_ID_WLCSP144_M5 QM_PIN_ID_9
#define QM_PIN_ID_WLCSP144_K5 QM_PIN_ID_10
#define QM_PIN_ID_WLCSP144_G1 QM_PIN_ID_11
#define QM_PIN_ID_WLCSP144_J4 QM_PIN_ID_12
#define QM_PIN_ID_WLCSP144_G2 QM_PIN_ID_13
#define QM_PIN_ID_WLCSP144_F1 QM_PIN_ID_14
#define QM_PIN_ID_WLCSP144_J5 QM_PIN_ID_15
#define QM_PIN_ID_WLCSP144_l4 QM_PIN_ID_16
#define QM_PIN_ID_WLCSP144_M4 QM_PIN_ID_17
#define QM_PIN_ID_WLCSP144_K4 QM_PIN_ID_18
#define QM_PIN_ID_WLCSP144_B2 QM_PIN_ID_19
#define QM_PIN_ID_WLCSP144_C1 QM_PIN_ID_20
#define QM_PIN_ID_WLCSP144_C2 QM_PIN_ID_21
#define QM_PIN_ID_WLCSP144_D1 QM_PIN_ID_22
#define QM_PIN_ID_WLCSP144_D2 QM_PIN_ID_23
#define QM_PIN_ID_WLCSP144_E1 QM_PIN_ID_24
#define QM_PIN_ID_WLCSP144_E2 QM_PIN_ID_25
#define QM_PIN_ID_WLCSP144_B3 QM_PIN_ID_26
#define QM_PIN_ID_WLCSP144_A3 QM_PIN_ID_27
#define QM_PIN_ID_WLCSP144_C3 QM_PIN_ID_28
#define QM_PIN_ID_WLCSP144_E3 QM_PIN_ID_29
#define QM_PIN_ID_WLCSP144_D3 QM_PIN_ID_30
#define QM_PIN_ID_WLCSP144_D4 QM_PIN_ID_31
#define QM_PIN_ID_WLCSP144_C4 QM_PIN_ID_32
#define QM_PIN_ID_WLCSP144_B4 QM_PIN_ID_33
#define QM_PIN_ID_WLCSP144_A4 QM_PIN_ID_34
#define QM_PIN_ID_WLCSP144_B5 QM_PIN_ID_35
#define QM_PIN_ID_WLCSP144_C5 QM_PIN_ID_36
#define QM_PIN_ID_WLCSP144_D5 QM_PIN_ID_37
#define QM_PIN_ID_WLCSP144_E5 QM_PIN_ID_38
#define QM_PIN_ID_WLCSP144_E4 QM_PIN_ID_39
#define QM_PIN_ID_WLCSP144_A6 QM_PIN_ID_40
#define QM_PIN_ID_WLCSP144_B6 QM_PIN_ID_41
#define QM_PIN_ID_WLCSP144_C6 QM_PIN_ID_42
#define QM_PIN_ID_WLCSP144_D6 QM_PIN_ID_43
#define QM_PIN_ID_WLCSP144_E6 QM_PIN_ID_44
#define QM_PIN_ID_WLCSP144_D7 QM_PIN_ID_45
#define QM_PIN_ID_WLCSP144_C7 QM_PIN_ID_46
#define QM_PIN_ID_WLCSP144_B7 QM_PIN_ID_47
#define QM_PIN_ID_WLCSP144_A7 QM_PIN_ID_48
#define QM_PIN_ID_WLCSP144_B8 QM_PIN_ID_49
#define QM_PIN_ID_WLCSP144_A8 QM_PIN_ID_50
#define QM_PIN_ID_WLCSP144_B9 QM_PIN_ID_51
#define QM_PIN_ID_WLCSP144_A9 QM_PIN_ID_52
#define QM_PIN_ID_WLCSP144_C9 QM_PIN_ID_53
#define QM_PIN_ID_WLCSP144_D9 QM_PIN_ID_54
#define QM_PIN_ID_WLCSP144_D8 QM_PIN_ID_55
#define QM_PIN_ID_WLCSP144_E7 QM_PIN_ID_56
#define QM_PIN_ID_WLCSP144_E9 QM_PIN_ID_57
#define QM_PIN_ID_WLCSP144_E8 QM_PIN_ID_58
#define QM_PIN_ID_WLCSP144_A10 QM_PIN_ID_59
#define QM_PIN_ID_WLCSP144_B10 QM_PIN_ID_60
#define QM_PIN_ID_WLCSP144_C10 QM_PIN_ID_61
#define QM_PIN_ID_WLCSP144_D10 QM_PIN_ID_62
#define QM_PIN_ID_WLCSP144_E10 QM_PIN_ID_63
#define QM_PIN_ID_WLCSP144_D11 QM_PIN_ID_64
#define QM_PIN_ID_WLCSP144_C11 QM_PIN_ID_65
#define QM_PIN_ID_WLCSP144_B11 QM_PIN_ID_66
#define QM_PIN_ID_WLCSP144_D12 QM_PIN_ID_67
#define QM_PIN_ID_WLCSP144_C12 QM_PIN_ID_68

/* Pin function name to pin function number. */

/* Pin ID 0. */
#define QM_PIN_0_FN_GPIO_0 QM_PMUX_FN_0
#define QM_PIN_0_FN_AIN_0 QM_PMUX_FN_1
#define QM_PIN_0_FN_SPI_S_CS_B QM_PMUX_FN_2

/* Pin ID 1. */
#define QM_PIN_1_FN_GPIO_1 QM_PMUX_FN_0
#define QM_PIN_1_FN_AIN_1 QM_PMUX_FN_1
#define QM_PIN_1_FN_SPI_S_MISO QM_PMUX_FN_2

/* Pin ID 2. */
#define QM_PIN_2_FN_GPIO_2 QM_PMUX_FN_0
#define QM_PIN_2_FN_AIN_2 QM_PMUX_FN_1
#define QM_PIN_2_FN_SPI_S_SCK QM_PMUX_FN_2

/* Pin ID 3. */
#define QM_PIN_3_FN_GPIO_3 QM_PMUX_FN_0
#define QM_PIN_3_FN_AIN_3 QM_PMUX_FN_1
#define QM_PIN_3_FN_SPI_S_MOSI QM_PMUX_FN_2

/* Pin ID 4. */
#define QM_PIN_4_FN_GPIO_4 QM_PMUX_FN_0
#define QM_PIN_4_FN_AIN_4 QM_PMUX_FN_1

/* Pin ID 5. */
#define QM_PIN_5_FN_GPIO_5 QM_PMUX_FN_0
#define QM_PIN_5_FN_AIN_5 QM_PMUX_FN_1

/* Pin ID 6. */
#define QM_PIN_6_FN_GPIO_6 QM_PMUX_FN_0
#define QM_PIN_6_FN_AIN_6 QM_PMUX_FN_1

/* Pin ID 7. */
#define QM_PIN_7_FN_GPIO_7 QM_PMUX_FN_0
#define QM_PIN_7_FN_AIN_7 QM_PMUX_FN_1

/* Pin ID 8. */
#define QM_PIN_8_FN_GPIO_SS_0 QM_PMUX_FN_0
#define QM_PIN_8_FN_AIN_8 QM_PMUX_FN_1
#define QM_PIN_8_FN_UART1_CTS QM_PMUX_FN_2

/* Pin ID 9. */
#define QM_PIN_9_FN_GPIO_SS_1 QM_PMUX_FN_0
#define QM_PIN_9_FN_AIN_9 QM_PMUX_FN_1
#define QM_PIN_9_FN_UART1_RTS QM_PMUX_FN_2

/* Pin ID 10. */
#define QM_PIN_10_FN_GPIO_SS_2 QM_PMUX_FN_0
#define QM_PIN_10_FN_AIN_10 QM_PMUX_FN_1

/* Pin ID 11. */
#define QM_PIN_11_FN_GPIO_SS_3 QM_PMUX_FN_0
#define QM_PIN_11_FN_AIN_11 QM_PMUX_FN_1

/* Pin ID 12. */
#define QM_PIN_12_FN_GPIO_SS_4 QM_PMUX_FN_0
#define QM_PIN_12_FN_AIN_12 QM_PMUX_FN_1

/* Pin ID 13. */
#define QM_PIN_13_FN_GPIO_SS_5 QM_PMUX_FN_0
#define QM_PIN_13_FN_AIN_13 QM_PMUX_FN_1

/* Pin ID 14. */
#define QM_PIN_14_FN_GPIO_SS_6 QM_PMUX_FN_0
#define QM_PIN_14_FN_AIN_14 QM_PMUX_FN_1

/* Pin ID 15. */
#define QM_PIN_15_FN_GPIO_SS_7 QM_PMUX_FN_0
#define QM_PIN_15_FN_AIN_15 QM_PMUX_FN_1

/* Pin ID 16. */
#define QM_PIN_16_FN_GPIO_SS_8 QM_PMUX_FN_0
#define QM_PIN_16_FN_AIN_16 QM_PMUX_FN_1
#define QM_PIN_16_FN_UART1_TXD QM_PMUX_FN_2

/* Pin ID 17. */
#define QM_PIN_17_FN_GPIO_SS_9 QM_PMUX_FN_0
#define QM_PIN_17_FN_AIN_17 QM_PMUX_FN_1
#define QM_PIN_17_FN_UART1_RXD QM_PMUX_FN_2

/* Pin ID 18. */
#define QM_PIN_18_FN_UART0_RXD QM_PMUX_FN_0
#define QM_PIN_18_FN_AIN_18 QM_PMUX_FN_1

/* Pin ID 19. */
#define QM_PIN_19_FN_UART0_TXD QM_PMUX_FN_0
#define QM_PIN_19_FN_GPIO_31 QM_PMUX_FN_1

/* Pin ID 20. */
#define QM_PIN_20_FN_I2C0_SCL QM_PMUX_FN_0

/* Pin ID 21. */
#define QM_PIN_21_FN_I2C0_SDA QM_PMUX_FN_0

/* Pin ID 22. */
#define QM_PIN_22_FN_I2C1_SCL QM_PMUX_FN_0

/* Pin ID 23. */
#define QM_PIN_23_FN_I2C1_SDA QM_PMUX_FN_0

/* Pin ID 24. */
#define QM_PIN_24_FN_I2C0_SS_SDA QM_PMUX_FN_0

/* Pin ID 25. */
#define QM_PIN_25_FN_I2C0_SS_SCL QM_PMUX_FN_0

/* Pin ID 26. */
#define QM_PIN_26_FN_I2C1_SS_SDA QM_PMUX_FN_0

/* Pin ID 27. */
#define QM_PIN_27_FN_I2C1_SS_SCL QM_PMUX_FN_0

/* Pin ID 28. */
#define QM_PIN_28_FN_SPI0_SS_MISO QM_PMUX_FN_0

/* Pin ID 29. */
#define QM_PIN_29_FN_SPI0_SS_MOSI QM_PMUX_FN_0

/* Pin ID 30. */
#define QM_PIN_30_FN_SPI0_SS_SCK QM_PMUX_FN_0

/* Pin ID 31. */
#define QM_PIN_31_FN_SPI0_SS_CS_B_0 QM_PMUX_FN_0

/* Pin ID 32. */
#define QM_PIN_32_FN_SPI0_SS_CS_B_1 QM_PMUX_FN_0

/* Pin ID 33. */
#define QM_PIN_33_FN_SPI0_SS_CS_B_2 QM_PMUX_FN_0
#define QM_PIN_33_FN_GPIO_29 QM_PMUX_FN_1

/* Pin ID 34. */
#define QM_PIN_34_FN_SPI0_SS_CS_B_3 QM_PMUX_FN_0
#define QM_PIN_34_FN_GPIO_30 QM_PMUX_FN_1

/* Pin ID 35. */
#define QM_PIN_35_FN_SPI1_SS_MISO QM_PMUX_FN_0

/* Pin ID 36. */
#define QM_PIN_36_FN_SPI1_SS_MOSI QM_PMUX_FN_0

/* Pin ID 37. */
#define QM_PIN_37_FN_SPI1_SS_SCK QM_PMUX_FN_0

/* Pin ID 38. */
#define QM_PIN_38_FN_SPI1_SS_CS_B_0 QM_PMUX_FN_0

/* Pin ID 39. */
#define QM_PIN_39_FN_SPI1_SS_CS_B_1 QM_PMUX_FN_0

/* Pin ID 40. */
#define QM_PIN_40_FN_SPI1_SS_CS_B_2 QM_PMUX_FN_0
#define QM_PIN_40_FN_UART0_CTS_B QM_PMUX_FN_1

/* Pin ID 41. */
#define QM_PIN_41_FN_SPI1_SS_CS_B_3 QM_PMUX_FN_0
#define QM_PIN_41_FN_UART0_RTS_B QM_PMUX_FN_1

/* Pin ID 42. */
#define QM_PIN_42_FN_GPIO_8 QM_PMUX_FN_0
#define QM_PIN_42_FN_SPI1_M_SCK QM_PMUX_FN_1

/* Pin ID 43. */
#define QM_PIN_43_FN_GPIO_9 QM_PMUX_FN_0
#define QM_PIN_43_FN_SPI1_M_MISO QM_PMUX_FN_1

/* Pin ID 44. */
#define QM_PIN_44_FN_GPIO_10 QM_PMUX_FN_0
#define QM_PIN_44_FN_SPI1_M_MOSI QM_PMUX_FN_1

/* Pin ID 45. */
#define QM_PIN_45_FN_GPIO_11 QM_PMUX_FN_0
#define QM_PIN_45_FN_SPI1_M_CS_B_0 QM_PMUX_FN_1

/* Pin ID 46. */
#define QM_PIN_46_FN_GPIO_12 QM_PMUX_FN_0
#define QM_PIN_46_FN_SPI1_M_CS_B_1 QM_PMUX_FN_1

/* Pin ID 47. */
#define QM_PIN_47_FN_GPIO_13 QM_PMUX_FN_0
#define QM_PIN_47_FN_SPI1_M_CS_B_2 QM_PMUX_FN_1

/* Pin ID 48. */
#define QM_PIN_48_FN_GPIO_14 QM_PMUX_FN_0
#define QM_PIN_48_FN_SPI1_M_CS_B_3 QM_PMUX_FN_1

/* Pin ID 49. */
#define QM_PIN_49_FN_GPIO_15 QM_PMUX_FN_0
#define QM_PIN_49_FN_I2S_RXD QM_PMUX_FN_1

/* Pin ID 50. */
#define QM_PIN_50_FN_GPIO_16 QM_PMUX_FN_0
#define QM_PIN_50_FN_I2S_RSCK QM_PMUX_FN_1

/* Pin ID 51. */
#define QM_PIN_51_FN_GPIO_17 QM_PMUX_FN_0
#define QM_PIN_51_FN_I2S_RWS QM_PMUX_FN_1

/* Pin ID 52. */
#define QM_PIN_52_FN_GPIO_18 QM_PMUX_FN_0
#define QM_PIN_52_FN_I2S_TSCK QM_PMUX_FN_1

/* Pin ID 53. */
#define QM_PIN_53_FN_GPIO_19 QM_PMUX_FN_0
#define QM_PIN_53_FN_I2S_TWS QM_PMUX_FN_1

/* Pin ID 54. */
#define QM_PIN_54_FN_GPIO_20 QM_PMUX_FN_0
#define QM_PIN_54_FN_I2S_TXD QM_PMUX_FN_1

/* Pin ID 55. */
#define QM_PIN_55_FN_GPIO_21 QM_PMUX_FN_0
#define QM_PIN_55_FN_SPI0_M_SCK QM_PMUX_FN_1

/* Pin ID 56. */
#define QM_PIN_56_FN_GPIO_22 QM_PMUX_FN_0
#define QM_PIN_56_FN_SPI0_M_MISO QM_PMUX_FN_1

/* Pin ID 57. */
#define QM_PIN_57_FN_GPIO_23 QM_PMUX_FN_0
#define QM_PIN_57_FN_SPI0_M_MOSI QM_PMUX_FN_1

/* Pin ID 58. */
#define QM_PIN_58_FN_GPIO_24 QM_PMUX_FN_0
#define QM_PIN_58_FN_SPI0_M_CS_B_0 QM_PMUX_FN_1

/* Pin ID 59. */
#define QM_PIN_59_FN_GPIO_25 QM_PMUX_FN_0
#define QM_PIN_59_FN_SPI0_M_CS_B_1 QM_PMUX_FN_1

/* Pin ID 60. */
#define QM_PIN_60_FN_GPIO_26 QM_PMUX_FN_0
#define QM_PIN_60_FN_SPI0_M_CS_B_2 QM_PMUX_FN_1

/* Pin ID 61. */
#define QM_PIN_61_FN_GPIO_27 QM_PMUX_FN_0
#define QM_PIN_61_FN_SPI0_M_CS_B_3 QM_PMUX_FN_1

/* Pin ID 62. */
#define QM_PIN_62_FN_GPIO_28 QM_PMUX_FN_0

/* Pin ID 63. */
#define QM_PIN_63_FN_GPIO_SS_10 QM_PMUX_FN_0
#define QM_PIN_63_FN_PWM_0 QM_PMUX_FN_1

/* Pin ID 64. */
#define QM_PIN_64_FN_GPIO_SS_11 QM_PMUX_FN_0
#define QM_PIN_64_FN_PWM_1 QM_PMUX_FN_1

/* Pin ID 65. */
#define QM_PIN_65_FN_GPIO_SS_12 QM_PMUX_FN_0
#define QM_PIN_65_FN_PWM_2 QM_PMUX_FN_1

/* Pin ID 66. */
#define QM_PIN_66_FN_GPIO_SS_13 QM_PMUX_FN_0
#define QM_PIN_66_FN_PWM_3 QM_PMUX_FN_1

/* Pin ID 67. */
#define QM_PIN_67_FN_GPIO_SS_14 QM_PMUX_FN_0
#define QM_PIN_67_FN_PLT_CLK_0 QM_PMUX_FN_1

/* Pin ID 68. */
#define QM_PIN_68_FN_GPIO_SS_15 QM_PMUX_FN_0
#define QM_PIN_68_FN_PLT_CLK_1 QM_PMUX_FN_1

/**
 * @}
 */

#endif /* __QM_PIN_FUNCTIONS_H__ */
